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 PPI/CC Hong Kong Polytechnic University Department of Electronic and Information Engineering Experiment On 8255 PPI chip Objectives : To study how 8255 PPI chip works. After completing this experiment, you should know the different operation modes of an 8255 PPI chip and how to configure the chip to operate in a particular operation mode. You should also know how to use handshake to transfer data in an interface. Software : Text editor, 8051 cross-assembler, 8051 linker and 8051 programmer
Apparatus : 8051 evaluation board and 8255 evaluation board Reference : H-P. Messmer, "The indispensable PC hardware book," 3rd Ed, Addison-Wesley, 1997 Chapter 29 Section 2. Barry B. Bery, "The Intel Microprocessors: 8086/8088, 80186/80188, 80286, 80386, 80486, Pentium, Pentium Pro Processor, Pentium II, Pentium III, Pentium 4 Architecture, Programming, and Interfacing", 6th Ed, Chapter 11, Section 3. 8255 datasheet AT89S8252 datasheet (instruction set)
Background The 8255 PPI chip is a general purpose programmable I/O device which is designed for use with all Intel and most other microprocessors. The 8255 has 24 I/O pins divided into 3 groups of 8 pins each. The groups are denoted by port A, port B and port C respectively. Every one of the ports can be configured as either an input port or an output port. The 8255 can be programmable in three different modes: * Mode 0: simple unidirectional input/output without handshake * Mode 1: unidirectional input/output with handshake via some pins of port C * Mode 2: bidirectional input/output with handshake via some pins of port C Handshake is a common technique used to transfer data in an interface. A computer and a device usually operate at different system clock rates and hence the data transfer between their corresponding I/O interface may not be so reliable. For example, the device might not be fast enough
CSF-LAB/PPI 8255/CC/EIE PolyU/p.1
to catch the data transmitted from the CPU. Handshake provides a means to improve the reliability of a data transfer. Method and details In this lab, you will study how to program an 8255 PPI chip to operate in different operation modes with an 8051 evaluation board and an 8255 evaluation board. Figure 1 shows the setup of the system. You are requested to modify some given 8051 program modules with a text editor in a computer. The modified programs, when they are run in the 8051 evaluation board, should be able to program port A and port B of the 8255 in the 8255 evaluation board to operate in one of their operation modes. You can assemble and link your program modules with the provided crossassembler and linker to generate executable files. Executable files can then be loaded to the 8051 evaluation board via the printer port of the computer to program the on-board AT89S8252. The AT89S8252 is a low-power, high-performance CMOS 8-bit microcomputer with 8K bytes of Downloadable Flash programmable and erasable read only memory and 2K bytes of EEPROM. The device is manufactured by Atmel and is compatible with the industry standard 80C51 instruction set and pinout.
printer port Computer
8051 evaluation board
8051 local bus
8255 evaluation board
Figure 1. Setup of the system After programming the AT89S8252, the AT89S8252 executes the loaded program to configure the 8255 and the ports of the 8255 should operate in the desired modes. As there are 3 ports in 8255 and each one of them can be programmed as an input or output port, there are a number of possible configurations. In this lab, four configurations given in Table 1 will be studied. configuration 1 2 3 4 Port A Port B Port C Mode 0, input Mode 0, output Don't care Mode 1, input Mode 0, output Handshake for port A Mode 0, input Mode 1, output Handshake for port B Mode 1, input Mode 1, output Handshake for ports A and B Table 1. Some configurations of 8255
You are requested to do the following in this lab. 1. Setup the apparatus as shown in Figure 2. CSF-LAB/PPI 8255/CC/EIE PolyU/p.2
2. Appendix D1 lists a program for configuration 1 (Ai0Bo0.asm). This program repeatedly reads port A and writes the data read to port B. Assemble, link and load the program into the 8051 evaluation board. You may refer to Appendix C for the details. Run the program and observe the behavior of the evaluation board. You may define the input with the dip switch connected to port A and the LEDs connected to port B show the data you input. Study the program. Pay special attention to the procedures of configuring the 8255 and the setting value of the control register. Try to derive your own setting from datasheet or the information provided in Appendix B. Check if yours is identical to the one provided in the program.
RD
Device A
port A Data
8051 (CPU)
Data
8255 (PPI)
port B
Data
WR
Device B
3. Appendix D2 lists a program (Ai0Bo0X.asm) for configuration 1 as well. In this program, a 2.5s delay is added into the loop. By doing so, it simulates the case that the CPU periodically reads port A and reports the result via port B immediately. Port B is programmed to blink before it reports a result. Load the program into the AT89S8252 evaluation board and run it. See what happens. Since port A operates at mode 0, no handshake is exploited. The CPU does not know when a data comes. Suppose every change of the dip switch corresponds a data byte transferred from an external device. Answer the following questions. Q1. Can the CPU receive and report all inputs from the device if the device transfers its data at a rate of 4 bytes per second? Q2. Suppose now the device transfers its data at a rate of 1 byte per second. Can the CPU know there is no available data from the device when it tries to read a byte from port A? Can it stop reading and reporting rubbish in such a case? 4. Appendix D3 lists a program for configuration 2(Ai1Bo0X.asm). In this program, as port A operates in mode 1, handshaking signal is provided through port C of 8255 and hence the CPU can make use of handshake to synchronize itself with an external device in a data transfer. This makes the transfer much more reliable.
CSF-LAB/PPI 8255/CC/EIE PolyU/p.3
RD
pC3
pC5 pC4
IBF STB Data
Device A
port A
8051 (CPU)
Data
8255 (PPI)
port B
pC1
Data
WR
pC0
Device B
pC2
Load the program into the AT89S8252 evaluation board and run it. Change the setting of the dip switch and press the button marked `port A mode 1 input' in the 8255 evaluation board once. This action corresponds to that an external device generates a strobe to signal the 8255 when its data is ready for transmission. What happens when you do this? Repeat the steps at different speed. Does the CPU miss receiving and reporting your inputs? Does the CPU read something even though you do not do anything? Study the program carefully. See how the program uses handshake to improve the performance. 5. Ai1Bo0X.asm does the job with programmed-I/O technique. It keeps checking the handshake signal and waits until the data is ready. This keeps the CPU busy doing something without contribution. The CPU can be released by using interrupt to handle a data transfer. Appendix D4 lists an incomplete program for configuration 2(Ai1Bo0.asm). It is a better alternative to Ai1Bo0X.asm.
RD INTR
pC3 pC5 pC4
IBF STB Data
Device A
port A
8051 (CPU)
Data
8255 (PPI)
port B
pC1
Data
WR
pC0
Device B
pC2
Complete the program by filling up the blank fields. Test your program with the evaluation boards. Study the program to see how it exploits interrupt to do the job. 6. Appendix D5 lists an incomplete program for configuration 3(Ai0Bo1.asm). Complete the program and test your program with the evaluation boards. Record your observation.
CSF-LAB/PPI 8255/CC/EIE PolyU/p.4
RD
pC3
pC5 pC4
Device A
Data
port A
8051 (CPU)
Data
8255 (PPI)
port B
pC1
Data OBF ACK
WR INTR
pC0
Device B
pC2
7. Based on Ai1Bo0.asm and Ai0Bo1.asm, write a program to configure 8255 to operate in configuration 4. Test your program and verify if it functions with the evaluation boards.
RD INTR
pC3 pC5 pC4
IBF STB Data
Device A
port A
8051 (CPU)
Data
8255 (PPI)
port B
pC1
Data OBF ACK
WR INTR
pC0
Device B
pC2
8. Try to configure the 8255 to function at other operation modes if time is allowed. (For more capable student) - END Appendix Appendix A. Schematic diagrams of the evaluation boards Appendix B. Summary of the technical information of 8255 Appendix C. Editing, assembling, linking and loading programs to the 8051 evaluation board Appendix D. Program listing Appendix E. View of the evaluation boards
CSF-LAB/PPI 8255/CC/EIE PolyU/p.5
Appendix A Schematic diagrams of the evaluation boards
CSF-LAB/PPI 8255/CC/EIE PolyU/p.6
CSF-LAB/PPI 8255/CC/EIE PolyU/p.7
Appendix B. Summary of the technical information of 8255 * Internal structure:
*
Port and register addresses:
*
Port connections:
CSF-LAB/PPI 8255/CC/EIE PolyU/p.8
*
Status word obtained by reading port C:
*
Command words:
CSF-LAB/PPI 8255/CC/EIE PolyU/p.9
*
Operation modes:
Mode 1 operation
Mode 2 operation
CSF-LAB/PPI 8255/CC/EIE PolyU/p.10
*
Set/reset IRTEs:
Port C Interrupt Signal Pin Number MODE 1 Port A IN Port B IN Port A OUT Port B OUT MODE 2 Port A IN Port A OUT PC3 PC3 PC4 PC6 PC3 PC0 PC3 PC0 PC4 PC2 PC6 PC2 To enable Interrupt Request Set Port C bit
CSF-LAB/PPI 8255/CC/EIE PolyU/p.11
Appendix C. Editing, assembling, linking and loading programs to the 8051 evaluation board You may use any text editor such as Notepad in Windows to edit your 8051 program. Then you can assemble and link your program so as to make it loadable to the evaluation board for debugging. Suppose your program is ready and is now stored in the working directory where the 8051 crossassembler(X8051.exe) and the 8051 linker(Link.exe) are in. Run X8051.exe to activate the crossassembler. Figure C1 shows the user interface of the cross-assembler. In the interface, the crossassembler will prompt for inputting listing destination, input filename and output filename. You have to specify the input filename. As for others, you can skip them by just entering `'. If no error is detected by the cross-assembler, an object file with extension `.obj' will be generated.
Figure C1. User interface of X8051.exe Run Link.exe to activate the linker. Figure C2 shows the user interface of the linker. The linker will prompt for inputting parameters. All you need to do is to specify the input filename. It should be an object file with extension `.obj'. As an example, Figure C2 shows the case that the input file is pgm8051.obj. You can skip all other prompts by just entering `'. If no error is detected, a binary file with extension `.hex' will be generated.
Figure C2. User interface of Link.exe A universal programmer called PonyProg is provided in this lab. Figure C3 shows the user interface provided by the programmer. This programmer can program a specified binary file into the flash CSF-LAB/PPI 8255/CC/EIE PolyU/p.12
memory of an 8051-compatiable controller via the printer port of a computer system. To order to do it successfully, you have to make sure that the device you want to program is AT89S8252. You can check (and select) via the listbox in the interface as shown Figure C3. Besides, you have to check the interface setup by selecting `Setup' in the pulldown menu `Options'. Select the setting shown in Figure C4.
Figure C3. User interface of the programmer After configuring the programmer, one can load a program, namely, a file of extension `.hex', into the working environment and program the AT89S8252 in the evaluation board. To load the program into the working environment, you can push the fourth pushbutton from the left in the toolbar and then select the desired file. Figure C5 shows a snapshot of the user interface after program `pgm8051.hex' was loaded into the environment. Then you can push the second pushbutton from the left in the toolbar to load the program into the AT89S8252.
CSF-LAB/PPI 8255/CC/EIE PolyU/p.13
Figure C4. Setting for the interface between the evaluation board and the computer
Figure C5. A snapshot of the user interface after a program is loaded into the working environment
CSF-LAB/PPI 8255/CC/EIE PolyU/p.14
Appendix D. Program listing D.1 listing of Ai0Bo0.asm
; Ai0Bo0.asm ; Port A -> mode 0 input ; Port B -> mode 0 output ; Input data from port A and output it to prot B pa pb pc cr equ equ equ equ 8000h pa+1 pa+2 pa+3 ; prot a ; prot b ; prot c ; control register djnz djnz ret r6,$1 r5,delay
;-----------------------------------end
org 00h ajmp main ;-----------------------------------main: mov sp,#60h mov call mov mov movx loop: mov movx mov movx jmp dptr,#pa a,@dptr dptr,#pb @dptr,a loop r5,#10 delay a,#90h dptr,#cr @dptr,a
; set stack pointer to address 60h ; delay 10ms for ; 8255 initialization ; set port a to mode 0 input ; and port b to mode 0 output
; input from port a ; output to port b
;-----------------------------------delay: mov r6,#50 $1: mov r7,#100 $2: djnz r7,$2
; delay time = r5*10ms
CSF-LAB/PPI 8255/CC/EIE PolyU/p.15
D.2 listing of Ai0Bo0X.asm
; Ai0Bo0X.asm ; Port A -> mode 0 input ; Port B -> mode 0 output ; Input data from port A and output it to prot B pa pb pc cr equ equ equ equ 8000h pa+1 pa+2 pa+3 ; prot a ; prot b ; prot c ; control register
call mov movx mov movx jmp
delay dptr,#pa a,@dptr dptr,#pb @dptr,a loop
; ; input from port a ; output to port b
org 00h ajmp main ;-----------------------------------main: mov sp,#60h mov call mov mov movx loop: mov call mov mov movx mov call mov mov movx mov r5,#250 delay a,#0 dptr,#pb ; @dptr,a r5,#2 delay a,#255 dptr,#pb ; @dptr,a r5,#2 r5,#10 delay a,#90h dptr,#cr @dptr,a
; set stack pointer to address 60h ; delay 100ms for ; 8255 initialization ; set port a to mode 0 input ; and port b to mode 0 output ; periodically wait 2.5s, get a data ; and dump it ; delay 2.5s ; ; clear port b for 20ms ; ; ; ; set port b for 20ms ; ;
;-----------------------------------delay: mov r6,#50 $1: mov r7,#100 $2: djnz r7,$2 djnz r6,$1 djnz r5,delay ret ;-----------------------------------end
; delay time = r5*10ms
CSF-LAB/PPI 8255/CC/EIE PolyU/p.16
D.3 listing of Ai1Bo0X.asm
; Ai1Bo0X.asm ; Port A -> mode 1 input ; Port B -> mode 0 output ; Input data from port A and output it to prot B pa pb pc cr equ equ equ equ org ajmp 8000h pa+1 pa+2 pa+3 00h main ; prot a ; prot b ; prot c ; control register
call mov movx mov movx jmp
delay dptr,#pa a,@dptr dptr,#pb @dptr,a loop
; ; input from port a ; output to port b
;-----------------------------------main: mov sp,#60h mov call mov mov movx loop: mov movx anl jz mov mov movx mov call mov mov movx mov dptr,#pc a,@dptr a,#20h loop a,#0 dptr,#pb ; @dptr,a r5,#2 delay a,#255 dptr,#pb ; @dptr,a r5,#2 r5,#10 delay a,#b0h dptr,#cr @dptr,a
; set stack pointer to address 60h ; delay 10ms for ; 8255 initialization ; set port a to mode 1 input ; and port b to mode 0 output
;-----------------------------------delay: mov r6,#50 $1: mov r7,#100 $2: djnz r7,$2 djnz r6,$1 djnz r5,delay ret ;-----------------------------------end
; delay time = r5*10ms
; get status word of 8255 ; to check if IBF(bit 5)=1
; clear port b for 20ms ; ; ; ; set port b for 20ms ; ;
CSF-LAB/PPI 8255/CC/EIE PolyU/p.17
D.4 listing of Ai1Bo0.asm
; Ai1Bo0.asm ; Port A -> mode 1 input ; Port B -> mode 0 output ; Input data from port A and output it to prot B pa pb pc cr equ equ equ equ 8000h pa+1 pa+2 pa+3 ; prot a ; prot b ; prot c ; control register
int1: mov call mov movx reti ;-----------------------------------delay: mov r6,#50 $1: mov r7,#100 $2: djnz r7,$2 djnz r6,$1 djnz r5,delay ret ;-----------------------------------end ; delay time = r5*10ms r5,#200 delay dptr,#pa a,@dptr ; delay 200ms to make ; IBF visible ; input from port a
org 00h ajmp main org 13h ajmp int1 ;-----------------------------------main: mov sp,#60h setb setb setb mov call mov mov movx mov mov movx loop: mov movx jmp dptr,#pb @dptr,a loop it1 ea ex1 r5,#10 delay a,_____ dptr,#cr @dptr,a a,_____ dptr,#cr @dptr,a
; set stack pointer to address 60h ; set int1 to negative edge trigger ; enable hardware interrupt ; enable int1 ; delay 10ms for ; 8255 initialization ; set port a to mode 1 input ; and port b to mode 0 output ; enable interrupt request ; for port a
; output to port b
;------------------------------------
CSF-LAB/PPI 8255/CC/EIE PolyU/p.18
D.5 listing of Ai0Bo1.asm
; Ai0Bo1.asm ; Port A -> mode 0 input ; Port B -> mode 1 output ; Input data from port A and output it to prot B pa equ 8000h ; prot a pb equ pa+1 ; prot b pc equ pa+2 ; prot c cr equ pa+3 ; control register org 00h ajmp main org 03h ajmp int0 ;-----------------------------------main: mov sp,#60h setb setb setb mov call mov mov movx mov mov movx loop: mov movx jmp dptr,#pa a,@dptr loop ; input from port a it0 ea ex0 r5,#10 delay a,_____ dptr,#cr @dptr,a a,_____ dptr,#cr @dptr,a
mov movx reti
dptr,#pb @dptr,a
; output to port b
;-----------------------------------delay: mov r6,#50 $1: mov r7,#100 $2: djnz r7,$2 djnz r6,$1 djnz r5,delay ret ;-----------------------------------end
; delay time = r5*10ms
; set stack pointer to address 60h ; set int0 to negative edge trigger ; enable hardware interrupt ; enable int0 ; delay 10ms for ; 8255 initialization ; set port a to mode 0 input ; and port b to mode 1 output ; enable interrupt request ; for port b
;-----------------------------------int0:
CSF-LAB/PPI 8255/CC/EIE PolyU/p.19
D.6 listing of Ai1Bo1.asm
; Ai1Bo1.asm ; Port A -> mode 1 input ; Port B -> mode 1 output ; Input data from port A and output it to prot B pa equ 8000h ; prot a pb equ pa+1 ; prot b pc equ pa+2 ; prot c cr equ pa+3 ; control register org 00h ajmp main org 03h ajmp int0 org 13h ajmp int1 ;-----------------------------------main: mov sp,#60h setb setb setb setb setb mov call mov mov movx mov mov movx mov mov movx it0 it1 ea ex0 ex1 r5,#10 delay a,______ dptr,_____ @dptr,a a,_______ dptr,______ @dptr,a a,_______ dptr,______ @dptr,a
loop: jmp loop ;-----------------------------------int0: mov dptr,_____ movx @dptr,a reti ;-----------------------------------int1: mov dptr,_____ movx a,@dptr reti ;-----------------------------------delay: mov r6,#50 $1: mov r7,#100 $2: djnz r7,$2 djnz r6,$1 djnz r5,delay ret ;-----------------------------------end ; delay time = r5*10ms
; output to port b
; input from port a
; set stack pointer to address 60h ; set int0 to negative edge trigger ; set int1 to negative edge trigger ; enable hardware interrupt ; enable int0 ; enable int1 ; delay 10ms for ; 8255 initialization ; set port a to mode 1 input ; and port b to mode 1 output ; enable interrupt request ; for port b ; enable interrupt request ; for port a
CSF-LAB/PPI 8255/CC/EIE PolyU/p.20
Appendix E. Views of the evaluation boardsProgram listing
Figure A.E-1 8051 evaluation board
Figure A.E-2 8255 evaluation board
CSF-LAB/PPI 8255/CC/EIE PolyU/p.21


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